IBS ELECTRONICS Circuits Technical Specification |
Seq
|
Item
|
Technical Specification
|
Remarks
|
Standard
|
Advanced
|
1
|
Number of Layer
|
1-10 Layers
|
12-16 Layers
|
|
2
|
Base Material
|
FR4(High TG), Teflon, Rogers, Aluminum Based
|
|
3
|
Finish Board Thickness
|
0.30 mm ~ 3.20 mm (8 mil ~ 126 mil)
|
0.20 mm ~ 4.5 mm (5 mil ~ 177 mil)
|
|
4
|
Minimum Core Thickness
|
0.15mm(6 mil)
|
0.10mm ( 4 mil)
|
|
5
|
Copper Thickness
|
Min. 1/2 OZ, Max. 4 OZ
|
Min. 1/3 OZ, Max. 6 OZ
|
Selective Area Available, Thicker Cu On Request
|
6
|
Min.Trace Wide&Line Space |
Single Sided
|
0.13 mm ( 5 mil )
|
0.10mm ( 4 mil)
|
|
Double Sided
|
0.13 mm ( 5 mil )
|
0.10mm ( 4 mil)
|
|
7
|
Min. Hole Diameter
|
Drilling /PTH
|
f0.20 mm ( 8 mil )
|
f0.20 mm ( 8 mil )
|
|
Punching
|
f1.0 mm ( 40 mil )
|
f0.90 mm ( 36 mil )
|
If Necessary
|
8
|
Dimension Tolerance
|
Hole Position
|
0.08 ( 3 mil )
|
|
Conductor Width(W)
|
20% Deviation of Master A/W
|
1mil Deviation of Master A/W
|
|
Hole Diameter(H)
|
NPTH:+/-0.05 mm ( 2 mil )
|
NPTH:+/-0.05 mm ( 2 mil )
|
|
PTH: +/-0.075 mm ( 3 mil )
|
PTH: +/-0.05 mm ( 2 mil )
|
|
Outline Dimension
|
0.13 mm ( 5 mil )
|
0.10 mm ( 4 mil )
|
|
Conductors & Outline ( C - O )
|
0.15 mm ( 6 mil )
|
0.13 mm ( 5 mil )
|
|
Warp and Twist
|
0.75%
|
0.50%
|
|
9
|
Surface Treatment On Land Area
|
Leadfree HASL, Entek, Immersion Silver, Immersion Tin, Golden Finger, OSP
|
|
10
|
V-Cutting
|
Panel Size
|
457.2mm X 622 mm ( max. )
|
457.2mm X 800 mm ( max. )
|
|
Board Thickness
|
0.50 mm (20mil) min.
|
0.30 mm (12mil) min.
|
|
Remain Thickness
|
1/3 board thickness |
0.40 +/-0.10mm ( 16+/-4 mil )
|
|
Tolerance
|
±0.13 mm(5mil)
|
±0.1 mm(4mil)
|
|
Groove Width
|
0.50 mm (20mil) max.
|
0.38 mm (15mil) max.
|
|
Groove to Groove
|
20 mm (787mil) min.
|
10 mm (394mil) min.
|
|
Groove to Trace
|
0.45 mm(18mil) min.
|
0.38 mm(15mil) min.
|
|
11
|
Slot
|
Slot size tol.L=2W
|
PTH Slot: L:+/-0.13(5mil) W:+/-0.08(3mil)
|
PTH Slot: L:+/-0.10(4mil) W:+/-0.05(2mil)
|
(1)L=Length of slot (2)W=Width of slot (3)Min.drill bit size for multi-hit is 0.60mm
|
NPTH slot(mm) L+/-0.10 (4mil) W:+/-0.05(2mil)
|
NPTH slot(mm) L:+/-0.08 (3mil) W:+/-0.05(2mil)
|
12
|
Min Spacing from hole edge to hole edge
|
0.30-1.60 (Hole Diameter)
|
0.15mm(6mil)
|
0.10mm(4mil)
|
|
1.61-6.50 (Hole Diameter)
|
0.15mm(6mil)
|
0.13mm(5mil)
|
|
13
|
Minimum spacing between hole edge to circuitry pattern
|
PTH hole: 0.20mm(8mil)
|
PTH hole: 0.13mm(5mil)
|
|
NPTH hole: 0.18mm(7mil)
|
NPTH hole: 0.10mm(4mil)
|
|
14
|
Image transfer Registration tol
|
Circuit pattern vs. index hole
|
0.10(4mil)
|
0.08(3mil)
|
|
Circuit patten vs.2nd drill hole
|
0.15(6mil)
|
0.10(4mil)
|
|
15
|
Registration tolerance of front/back image
|
0.075mm(3mil)
|
0.05mm(2mil)
|
|
16
|
Multilayers
|
Layer-layer misregistration
|
4layers: |
0.15mm(6mil) max.
|
4layers:
|
0.10mm(4mil) max.
|
|
6layers: |
0.20mm(8mil) max.
|
6layers:
|
0.13mm(5mil) max.
|
|
8layers: |
0.25mm(10mil) max.
|
8layers:
|
0.15mm(6mil) max.
|
|
Min.Spacing From Hole Edge to Innerlayer Pattern
|
0.225mm(9mil)
|
0.15mm(6mil)
|
|
Min.Spacing From Outline to Innerlayer Pattern
|
0.38mm(15mil)
|
0.225mm(9mil)
|
|
Min. board thickness
|
4layers:0.30mm(12mil)
|
4layers:0.20mm(8mil)
|
|
6layers:0.60mm(24mil)
|
6layers:0.50mm(20mil)
|
|
8layers:1.0mm(40mil)
|
8layers:0.75mm(30mil)
|
|
Board thickness tolerance
|
4layers:+/-0.13mm(5mil)
|
4layers:+/-0.10mm(4mil)
|
|
6layers:+/-0.15mm(6mil)
|
6layers:+/-0.13mm(5mil)
|
|
8-12 layers:+/-0.20mm (8mil)
|
8-12 layers:+/-0.15mm (6mil)
|
|
17
|
Insulation Resistance
|
10KO~20MO(typical:5MO)
|
|
18
|
Conductivity
|
<50O(typical:25O)
|
|
19
|
Test voltage
|
250V
|
|
20
|
Impedance control
|
Typical: 50O+/-10%
|
|